Inferring a DDR Input

[Altera_Forum]

In Stratix2, is there a way to infer the DDR input registers?

[Altera_Forum]

You are best off using the ALTDDIO_IN megafunction. You can find the specifics of this by searching for Megafunction --> list of in Quartus help. When trying to use device macros it is best to use the megafunctions.

[Altera_Forum]

And just in case FPGA_GUY didn't make it totally clear... No, you can't infer the megafunction in any of the major synthesis tools right now (third-party or Quartus II) - it's not like memory or multiplier functions which tools can infer from code and map to the device hardware blocks. I think it might be possible in theory so who knows, the vendors might add it some time, but instantiating the megafunction is pretty easy so I doubt it's a priority. 

 The Altera docs actually list the functions can that be inferred... Check out "Recommended HDL Coding Styles" http://www.altera.com/literature/hb/qts/qts_qii51007.pdf. Page 2 in the current 7.0.0 version:  You must use megafunctions to access some Altera device-specific features. You can infer or instantiate megafunctions to target some features such as memory and DSP blocks. You must instantiate megafunctions to target device features such as LVDS drivers, phase-locked loops (PLLs), transceivers, and double-data rate input/output (DDIO) circuitry.

[Altera_Forum]

someone interested to sdram controller?

[Altera_Forum]

I think this is a very good question as the manual is a bit unclear. If you design a DDR register bank (2 registers with a mux tied to an IO pin), I don't see why this couldn't be inferred, but nothing says whether or not it is.