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Valued Contributor III

Avalon st video control data packets format

Hi all, I´m producing video data with the Test Pattern Generator II and moving the video data from avalon st into the fabric to the soc ddr3 with the modular scatter gather DMA (dispatcher and write master) for online video streaming. 


All runs fine and the video is ok but i cannot understand the contents of the video control data packetsgenerated by the TPG. 


the configuration of the tpg is:  



On the picture below, the most left data are memory addresses, the green bordered data are the last and first pixels (black) of the frames but i cannot understand the data --> | 00:00:0f:xx | 0a:00:00:xx | 00:00:00:xx | 02:08:07:xx | 00:00:00:xx 


Note that xx (the most right bytes) are dummy bytes because the TPG transmit only 3 bytes [23:0] in parallel.  


I know that the first 0F is the control packet mark (15 decimal), the 0A must be the horizontal resolution (160 is A0 in hex) but not 0A, after the horizontal resolution, the next data must be the vertical res (120) but i can´t understand the data format and the 00 00 00 00 data after the horizontal res and after the vertical res... 


The 02:08:07:xx must be the interlacing unknow data(binary 10) with the vertical res data but i can´t understand the 00 00 00 00 and the data justification.
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Valued Contributor III

Would be helpfull to see to what address you write exactly and how you fill the missing 8-bit for the 32-Bit or if they just gets filled wit the next subdata. And maybe change the visualisation of the memory content, I guess it is only a visualisation issue and the data is correct. Could you visualize maybe some signalTap-Output? 


And keep in mind that only the lower nibble of the bytes holds values while transferring the control packet...
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