Intel MAX 10 FPGA doesn't support LVTTL at 3.3V with a VOL (max)= 0.40V??

[jasmel]

Hello 

We would like to use the Intel MAX 10 FPGA to drive a 3.3V LVTTL as a JESD8-B. But the datasheet doesn't show that compatibility: VOL(max) = 0.45V, which do NOT follow the JESD8-B requirement (table 20 in document 683794) where the VOL(max) <= 0.40V.

Can you explain?

[FvM]

Hello,
I wonder what's the actual design problem? The Jedec document reflects the necessity to fix certain numbers in a standard, not more. According to Ibis files, MAX10 keeps 0.4V@4mA with LVTTL 4 mA IO-standard. The 0.45 V number is apparently adding some worst case margin. If you feel that LVTTL 4 mA drive strength is insufficient for your actual load condition, use LVTTL 8 mA.

Regards,
Frank

[jasmel]

Hello Frank.

Our design need to support Jedec JESD8-B or C, when driving a low level at 8mA and with a VOL(Max) =<0.40V. The table shows a higher value at 0.45V.

Where in the IBIS model does it show the VOL(Max) related to a drive level for the MAX 10 FPGA?

Currently, the documentation doesn't that information, and we can not rely on it.

Thanks

[Mengzhe]

Hi，

​This issue has been reported to the factory for confirmation and double check.

The confirmation result will be posted here.

Thanks for your attention and reminder.

Best Regards,

Mengzhe

[_AK6DN_]

I think you will find that the Altera standard spec on all their datasheets for 3.3V LVTTL is 0.45V max at 4ma.

For 3.3V LVCMOS is is 0.2V at 2ma.

Same spec for CycloneIV, CycloneV, MAX10.

If I look at some Xilinx datasheets, they tend to spec their 3.3V LVTTL as 0.40V max at maximum drive level.

So my guess is JESDB spec writers were a bunch of Xilinx users and just took their spec sheet numbers.

If you can't accept the extra 50mV on the worst case then add an external high current driver.

You will find the typical Vol is normally much less than 0.45V for 3.3V LVTTL at the spec'ed load of 4ma anyway.

[Mengzhe]

Hi,

Considering your design need to support Jedec JESD8-B or C, I think whether 0.45 V of VOLmax works depends on the opposite end.

If the other end supports LVTTL 3.3V, refer to JESD8-B/C, VILmax is 0.8 V, which is higher than 0.45 V.

To make sure your design works, you can run simulation to check if VIL meets VILmax.

Best Regards,

Mengzhe