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Hi,
I am using the DDR2 SDRAM HP controller for a 1GB DIMM (though i am only attempting to use about 128MB). Initially, I thought I was having timing problems since I always got memory fails reading and writing. Looking closer, I noticed that only specific bits are failing (not all bits since they don't read back all zero). Observe the following output from my test program: Fail found at 420598 DWORD, read value=000668F6h, expected value=20066AF6h Fail found at 420604 DWORD, read value=000668FCh, expected value=20066AFCh Fail found at 420606 DWORD, read value=000668FEh, expected value=20066AFEh Fail found at 421376 DWORD, read value=00066C00h, expected value=20066E00h Fail found at 421380 DWORD, read value=00066C04h, expected value=20066E04h Fail found at 421382 DWORD, read value=00066C06h, expected value=20066E06h Fail found at 421384 DWORD, read value=00066C08h, expected value=20066E08h Fail found at 421388 DWORD, read value=00066C0Ch, expected value=20066E0Ch the value loaded into memory should be the address of the memory as seen from the memory mapped I/O. Notice that ONLY addresses and values that use the 10th and 30th bit (both fail at the same time for some reason). I am not certain what could be causing this problem. Perhaps I have configured the command and control improperly. Notice also the jump from 420606 to 421376 which means that it's likely not other even-numbered addresses referenced by bits below the 10th. I am using the 10th bit as the precharge bit.Link Copied
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If I understand right, only some of many test reads are failing. If so, a problem of signal quality or timing should be expected.
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As FvM said, you got a timing problem. Not on all data pins, but on some, thats why you see that behaviour where only specific bits are messed up.
Lokla
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