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Interrupt from FPGA received only one time !

New Contributor I



I am struggling with interrupt from fpga.

I am using gpio from DE-10 nano board (KEY0), which is routed to f2h_irq1.

On clicking the button I receive interrupt from the 1st time, but trying to press it again, does not result in any further interrupt...


I am not sure what wrong I am doing, please help.


These are the steps I'm doing:

1.  enable F2H bridge :

ret = socfpga_bridge_setup(ALT_BRIDGE_F2H)

2.configure interrupt to edge trigger (ICDICFRn register) + enable interrupt

3. enable interrupt (ICDISERn register) in PIO (key0 in de-10 nano):

(*(volatile unsigned int*)(ALT_LWFPGASLVS_OFST + 0x5000 + 0x8)) = 0xff;

4. in interrupt handler just increment counter, and then clean interrupt bit (ICCIAR)


Any idea what's wrong ? any example available ?


Thank you!


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7 Replies



Are you referring on how to interface the ARM* Generic Interrupt Controller (GIC)?


We have an example that demonstrates the interface, though the document does not discussed the advances usage of the GIC, but it will indeed help you.

There are also examples in the tutorial that interrupts from the pushbutton KEY port in the FPGA. 


You can copy paste the link below to download the tutorial:



New Contributor II



Thank you very much for the answer.


I observe a similar behavior (handle is not called in interrupt) in 2 different baremetal OS: uc/os (page: and code-time .

In both of this OS, I just added a call to the interrupt (72, 73) of irq0 and irq1 (which should be operated from KEY0 and KEY1 on DE-10 nano board) according to qsys of GHRD:



These are the steps I am doing:

  1. I use DE-10 nano, with an example for bare-metal which work AS-IS without any modifications. The example is for uc/os , and can be downloaded from this
  2. Load fpga GHRD for DE-10 nano
  3. I added interrupt call for KEY0 as following:


BSP_IntVectSet(INT_ID_FPGA_IRQ1, 0, CPU_ID_IF_0, BSP_OS_FpgaIntHandler);   BSP_IntSetType();   BSP_IntEnable(INT_ID_FPGA_IRQ1);   void BSP_IntSetType (void) { ARM_GIC_DIST_REG->ICDICFRn[4] = 0xffffffff; }


4.reset board - click key0 , first interrupt is being caught with a breakpoint, but on continue and clicking key0 again - nothing happens.


Is there any baremetal example showing how to catch interrupt from FPGA to HPS ?


 Best Regards,




Hi ranran,


May I know where you get the interrupt call example that you added in? Or is it from your own?


Well, the PL390 Generic Interrupt Controller (GIC) supports up to 180 interrupt sources, including dedicated peripherals and IP implemented in the FPGA fabric. This is from ARM.


More information about the PL390 GIC, you can refer to the Interrupt Controller chapter of the Cortex-A9 MPCore Technical Reference Manual, available on the ARM Infocenter website:


Please give me sometime to check this out, I assume the interrupt is working but only for the first time, I will try to find a continuous interrupt example for your case.

New Contributor II



Yes. The uc/os based example can be downloaded from here:

it catch timer and serial interrupts from HPS side, I just added the code above to catch interrupt 72, and 73, which should be for FPGA2HPS irq 0 and irq 1.

I remembered to load DE10_NANO_SoC_GHRD.sof into FPGA before running the HPS example.

If you download the terrasic cd (from here, there is a folder DE10_NANO_SoC_GHRD, which contains qsys of the project, from there I can see that interrupts 72,73 are given from FPGA to HPS and are routed to KEY0 and KEY1 on board. I also tried to change qsys with interval timer instead of KEY0 but got the same behavior.


I also tried with another OS - code-time, which also has a demo for DE10, and I also added 2 lines for setting and enabling interrupt 72,73. But in this case I even didn't get the 1st interrupt ( code-time demo can be given after a request from code-demo support).


But again, maybe I miss something very basic in the process ?

I also very surprised that I can't find ANY baremetal example which show how to catch interrupt which comes from fpga to HPS !!


I hope you can help with it, because a whole project depends on this capability.


Thank you for any idea



Hi ranran,


I could not find the specific example, but we do have a GPIO example showing how to handle the interrupts for DE10 nano:


The FPGA design illustrates how the programmable logic can be used to extend the peripherals available to a processor.

New Contributor I

The issue been solved.

For anyone with similar problem try the following:

  1. check which type of interrupt is used level or edge in the pio (check in qsys), if it's edge, the HPS GIC should handle it as edge !
  2. it is required to clear edge interrupt in PIO, by writing into PIO edge "edgecapture" (edge detection bit)
  3. It is also required to be sure that writing the PIO works, i.e. required first to enable LWH2F , and best to check in memory view that the registers are read/written correctly (without enabling the bridge it won't do anything)
  4. if all above does not work, better to verify with signaltap what happens in irq signal.


New Contributor II



Thanks, but I think this example is not very much helpful:

The GPIOs are HPS GPIOs (not FPGA), and also it is for Linux.


I am trying to get interrupt from FPGA to HPS , and also with baremetal.


Is there any example of FPGA-TO-HPS interrupt ? (if it's a baremetal example it's preferred, if not I can still check)

Is there anything which can explain why I fail to get interrupt from FPGA to HPS ?


What did you mean by "I could not find the specific example" ? Did you try to donwload the uc/os example ?


Thank you,