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Hi everyone,
I'm sending out from FPGA a lot of signals at LVDS with low data rate.
Is it possible to use both true LVDS transmitter channels and emulated LVDS output channels together as an output LVDS channels?
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Hi everyone,
Do you have something new about this issue?
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Hi @AGofs Theoretically possible depending on how low is your datarate. However, for the LVDS IP Core, you can give a quick try to assign part of the channels as True and the others as Emulated, and see if the fitter allows it.
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Hi JwChin,
Thank you for your answer!
I'll try to use LVDS_TX IP core to check if it is possible.
But what will happen if resistor terminations (for LVDS emulated channels) will be removed?
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Let me put this answer in the right place: The RS and RP external resistors is to give an effective 100 ohm differential output impedance

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