I'm sending out from FPGA a lot of signals at LVDS with low data rate.
Is it possible to use both true LVDS transmitter channels and emulated LVDS output channels together as an output LVDS channels?
Hi @AGofs Theoretically possible depending on how low is your datarate. However, for the LVDS IP Core, you can give a quick try to assign part of the channels as True and the others as Emulated, and see if the fitter allows it.
Thank you for your answer!
I'll try to use LVDS_TX IP core to check if it is possible.
But what will happen if resistor terminations (for LVDS emulated channels) will be removed?