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Hi I'm trying to load up the flash connected to my FPGA with an image via Quartus possibly using a (JIC), and use Signal Tap to check some signal behaviour. I setup signal tap and compile the design as normal, then use the generated .SOF file to generate a .JIC file. I then program the device with the .JIC file but get "Program the Device to continue" when trying to use Signal Tap.
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If .jic image has been compiled with Signaltap, the tool will recognize the image. To be sure, you can ignore the message and start acquisition. You either succeed or get an "incompatible image" message. In the latter case, you didn't manage to put the right image into .jic.
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If .jic image has been compiled with Signaltap, the tool will recognize the image. To be sure, you can ignore the message and start acquisition. You either succeed or get an "incompatible image" message. In the latter case, you didn't manage to put the right image into .jic.
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Would an actual Signal Tap core be better suited for this or is using just the .stp file the preferred method.
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I prefer .stp
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I figured out the issues, needed to power cycle the board before it would recognise the new build loaded in the Signal Tap would be able to see the STP instance.
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I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

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