JTAG Boundary Scan Register order for unpackaged device

[Altera_Forum]

Hello all, 

 I have an embedded MaxII device (EPM240Z) inside a custom chip that my organization has had fabricated. I am attempting to use extest command to control signals internal to the chip.  The BSDL files for EMP240Z files allude to boundary scan register order based on package...  The documentation delivered with our chip specifies MaxII pin name ("G2", "F3", etc.) to internal signal. Is there a standard order of the BSR pins, or do I need to know more information from the fab?  e.g. for an unpackaged MaxII, is the BSR pin order something standard like ['A1', 'A2', 'A3',... , ]??  Thanks, Jimmy

[Altera_Forum]

Our fab provided the bank and pin information; they had been alluding to MaxII pins in a letter/number way similar to packaged maxii parts, but we're still not sure where that came from...