JTAG programming of FPGAs

[Altera_Forum]

Dear sir, 

 I really don't understand why the programming of FPGA are done (which will have SRAM) by using JTAG interface.  What is the use of it as when we remove power to target(where FPGA is mounted on board), all programmed contents of FPGA will be lost.  Please explain me, when shall we use JTAG based programming of FPGA ?    Regards, Thulasi

[Altera_Forum]

For testing?

[Altera_Forum]

JTAG is main for boundary scan testing, but programmer also uses JTAG

[Altera_Forum]

JTAG is also used in case you have the SignalTap activated to have some kind of "on chip Logic Analyzer" and to access content of instantiated RAM-blocks (memory editor) - with NIOS II the JTAG is also a communication interface to the PC... 

Thus JTAG is not only (but also useful) for pure hardware testing (boundary scan) but for debugging :-D Especially as this speeds up firmware development for new firmware can be loaded and tested w/o power OFF - connect programmer - Power ON - update EEPROM - Power OFF - disconnect programmer - Power ON => new firmware is loaded...