JTAG .svf instructions descriptions

Nikolay_Rognlien · ‎01-29-2019

I want to program an 5M240ZT144 with an *.SVF file from in an embedded system.

The .svf generated from Quartus does a SiliconID Check and fails. I see in the file that it is done with other commands(0x203 followed by 0x205) than I expect from the documentation:

!CHECKING SILICON ID
!
!
!
SIR 10 TDI (203);
RUNTEST 93 TCK;
SDR 14 TDI (0111);
SIR 10 TDI (205);
RUNTEST 93 TCK;
SDR 16 TDI (FFFF) TDO (8232) MASK (FFFF);
SDR 16 TDI (FFFF) TDO (2AA2);
SDR 16 TDI (FFFF) TDO (4A82);
SDR 16 TDI (FFFF) TDO (8C0C);
SDR 16 TDI (FFFF) TDO (00C0);
!

From the Max V Handbook I expected to see in Table 6-1(part2) that the IDCODE instruction has value 0x006

Also the expected output values 0x8232, 0x2AA2, 0x4A82, 0x8C0C and 0x0C00 does not resemble the 0x020A50DD in the table below.

Can somebody please explain it, or is there a document somewhere describing the .SVF format and JTAG instructions used in the MAX V .SVF file?

Regards

/Nikolay

JohnT_Intel · ‎01-30-2019

Hi, May I know how do you generate the svf file?

Nikolay_Rognlien · ‎01-30-2019

Hi.

In Menu Assignments => Device => Device and Pin Options:

Under category Programming Files; check box "Serial Vector Format File(.svf)"

The compilation now generates an .svf file. File attached.

-Nikolay

JohnT_Intel · ‎01-30-2019

Hi, Could you use the Quartus programmer to generate the svf file? This is to check if there is any issue by using manual generated file. You may follow the guide in https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd07222008_677.html

Nikolay_Rognlien · ‎01-30-2019

Sorry, that line is "greyed out"... Why?

JohnT_Intel · ‎01-31-2019

May I know if you have add your sof or POF file into Quartus programmer? It need to have the same chain as what you are using in your board.

Nikolay_Rognlien · ‎01-31-2019

Hi John.

I tried a new approach of creating the .svf file:

I opened the Quartus Programmer window,
scanned the JTAG chain of my Arrow Max1000 board
assigned my .sof to the 10M08SAU169(only device in chain)
verified that it configured successfully
from the Programmer Window File menu, I chose "Create JAM, JBC, SVF or ISC file"
selected File Format=SVF, Operation=Program and hit OK.

The new .svf was a little bit different, but still contained a lot of undescribed SIR commands like 201, 203 and 307...

!Copyright (C) 2018  Intel Corporation. All rights reserved.
!Your use of Intel Corporation's design tools, logic functions 
!and other software and tools, and its AMPP partner logic 
!functions, and any output files from any of the foregoing 
!(including device programming or simulation files), and any 
!associated documentation or information are expressly subject 
!to the terms and conditions of the Intel Program License 
!Subscription Agreement, the Intel Quartus Prime License Agreement,
!the Intel FPGA IP License Agreement, or other applicable license
!agreement, including, without limitation, that your use is for
!the sole purpose of programming logic devices manufactured by
!Intel and sold by Intel or its authorized distributors.  Please
!refer to the applicable agreement for further details.
!
!Quartus Prime SVF converter 18.1
!
!Device #1: 10M08SA - C:/qdesigns/Nikolay/dummy_design/output_files/dummy_desgin_Max10.sof Thu Jan 31 21:15:20 2019
!
!NOTE "USERCODE" "0037E933";
!
!NOTE "CHECKSUM" "0037E933";
!
!
!
FREQUENCY 2.50E+07 HZ;
!
!
!
TRST ABSENT;
ENDDR IDLE;
ENDIR IRPAUSE;
STATE IDLE;
!
!Max 10 Enable ISP
!
SIR 10 TDI (2CC);
RUNTEST IDLE 8750003 TCK ENDSTATE IDLE;
SIR 10 TDI (203);
RUNTEST 128 TCK;
SDR 23 TDI (500008);
SIR 10 TDI (205);
RUNTEST 128 TCK;
SDR 32 TDI (00000000) TDO (1E000000) MASK (FF800000);
!
!Max 10 DSM Clear
!
SIR 10 TDI (203);
RUNTEST 128 TCK;
SDR 23 TDI (000000);
SIR 10 TDI (3F2);
RUNTEST 8750003 TCK;
!
!Max 10 DSM Verify
!
SIR 10 TDI (307);
RUNTEST 128 TCK;
SDR 1 TDI (0) TDO (1) MASK (1);
!
!Max 10 Program ICB
!
SIR 10 TDI (203);
RUNTEST 128 TCK;
SDR 23 TDI (300000);
SIR 10 TDI (3F4);
RUNTEST 128 TCK;
SDR 32 TDI (6C48A50F);
RUNTEST 8000 TCK;
!
!Max 10 DSM Verify
!
SIR 10 TDI (307);
RUNTEST 128 TCK;
SDR 1 TDI (0) TDO (1) MASK (1);
!
!Max 10 Program ICB
!
SIR 10 TDI (203);
RUNTEST 128 TCK;
SDR 23 TDI (380000);
SIR 10 TDI (3F4);
RUNTEST 128 TCK;
SDR 32 TDI (FFF7FFFF);
RUNTEST 8000 TCK;
!
!Max 10 DSM Verify
!
SIR 10 TDI (307);
RUNTEST 128 TCK;
SDR 1 TDI (0) TDO (1) MASK (1);
!
!Max 10 Program ICB
!
SIR 10 TDI (203);
RUNTEST 128 TCK;
SDR 23 TDI (480000);
SIR 10 TDI (3F4);
RUNTEST 128 TCK;
SDR 32 TDI (6C48A50F);
RUNTEST 8000 TCK;
!
!Max 10 DSM Verify
!
SIR 10 TDI (307);
RUNTEST 128 TCK;
SDR 1 TDI (0) TDO (1) MASK (1);
!
!Max 10 Program ICB
!
SIR 10 TDI (203);
RUNTEST 128 TCK;
SDR 23 TDI (680000);
SIR 10 TDI (3F4);
RUNTEST 128 TCK;
SDR 32 TDI (6C48A50F);
RUNTEST 8000 TCK;
!
!Max 10 DSM Verify
!
SIR 10 TDI (307);
RUNTEST 128 TCK;
SDR 1 TDI (0) TDO (1) MASK (1);
!
!Max 10 Disable ISP
!
SIR 10 TDI (201);
RUNTEST 8750003 TCK;
SIR 10 TDI (002);
RUNTEST 2500000 TCK;
SDR 1348944 TDI (00000000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
	FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF12B900000000
	00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000401000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
	00000000000000000000000000000000000004000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000000000000000000000000000003634000018970000000000000000000000000000000000000000000000000000000000000000000000000000
	00000000000000000000000000000000000000000000000000000000000000000000000000000000040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040000000000000004000000000000000000000000000000000000000000000000
	00000000000000000000000000000000000000000000000000000000000000000000000000000800000000000000000000363400007CE5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
 
 
...and so on.....

I also tried the same with a Max V device, and got the same unknown commands...

Maybe the documentation needs to be updated with correct commands?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-v/mv51006.pdf

JohnT_Intel · ‎02-01-2019

May I know how do you run the SVF file? What error are you observing?