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Hi,
Long back A+PLUS software is used for our design to target to the Altera's Classic device EP910LI-35. Now MAX+PLUSII is used to target to the same device. If there is no change in the design file(VHDL) will the checksum of the old JEDEC generated by the A+PLUS and the new JEDEC generated by the MAX+PLU II match? Thanks, LathaLink Copied
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seems unlikely that the checksums would be the same. :(
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trying a test case with each software is probably going to be your best bet on a straight answer.

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