Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Lost JTAG communication

Altera_Forum
Geehrter Beitragender II
1.256Aufrufe

Hello All, 

 

I am using a Stratix II with an EPC16 configuration device. I've managed to create a situation where I cannot achieve JTAG communication after programming with a .POF file. My error was that I forgot to set the unused pins to the tristate condition and ended up grounding them instead. Is there a way to disable the load on power-up so that I can get the JTAG communication back or erase the configuration device so that I can load the corrected .POF file? 

Thanks.
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2 Antworten
Altera_Forum
Geehrter Beitragender II
550Aufrufe

You could drive the nConfig pin low (short it to ground). I believe you can just do this momentarily. 

 

Jake
Altera_Forum
Geehrter Beitragender II
550Aufrufe

Thanks Jake, 

 

I tried your suggestion, but it didn't work in this case. It got me thinking though that I could lift the Data0 pin and maybe the Stratix ll wouldn't program - this worked! Thanks for the reply. 

 

Gary
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