Lvds Rx receiver latency

[kikoss]

Hello 

I instantiated the LVDS RX IP  - with the following parameters : 

-fpga : agilex7

-datarate : 192mbps 

-serdes factor : 6 

-income frequency : 96mhz 

We are interested about what's the latency of the LVDS RX ip , following the parameters above ? 

I go over the "Intel Agilex 7 LVDS SERDES User Guide: F-Series and I-Series" doc , but seems no relevant information 

Thx 
Kikoss

[AqidAyman_Intel]

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[AqidAyman_Intel · Accepted solution]

Hello,

You can refer more information for the LVDS SERDES Intel® FPGA IP Receiver Settings:

https://www.intel.com/content/www/us/en/docs/programmable/721819/24-2/receiver-settings.html

For the Bitslip rollover value, you can specify the maximum latency for the bit slip to inject.

Regards,

Aqid

[AqidAyman_Intel]

Hello,

I wish to follow up. Do you need more support/help for this issue?

Or any more concern from you before I close this thread?

[kikoss]

Hello its fine

Thank you very much !

[AqidAyman_Intel]

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