Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20704 Discussions

MAX 10 using on chip flash with Nios II

AWals
Beginner
1,092 Views

I am trying to use the alt_write_flash function to program data to the UFM on a MAX 10 device. The program code for the Nios II is executing in place from the UFM space (boot option 1b) but i would like to write to unused UFM from the program code. Is this allowed by the onchip flash controller? When i use the alt_write_flash function in the Nios II code it just hangs indefinitely.

0 Kudos
2 Replies
AWals
Beginner
704 Views

Now I am getting a timeout during the UFM write. I am also experiencing pretty flaky behavior when writing to UFM. When I compile the design I get the following timing warning in the quartus messages.

 

Warning (332056): PLL cross checking found inconsistent PLL clock settings:

Warning (332056): Node: u0|onchip_flash_0|altera_onchip_flash_block|ufm_block|osc was found missing 1 generated clock that corresponds to a base clock with a period of: 181.818

0 Kudos
Ahmed_H_Intel1
Employee
704 Views

Hi Alan,

It seems that the PLL setting is not correct. Can you please check the PLL?

This maybe the main reason why the flash isn't responding.

Regards,

 

0 Kudos
Reply