Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

MAX_FANOUT problem

Altera_Forum
Honored Contributor II
1,977 Views

Hi  

 

I have set a global fanout constraint to 25 and the tool is also inserting cells as shown in the info generated. 

But still when i see the fitter report there are NON-GLOBAL signals with fanouts of 400 . 

Even by using the assignment editor if i set the instance fanout assignments for those signals the tool is accepting it and no report for ignored fanout assignments are genrated but still the signals are having the same fanout if i check the fitter rpt. 

The state is quite confusing that the assignment is not ignored and not even implemented. 

Please guide me with this. 

Thanks
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
820 Views

There could be answer that the signals are outputs of a combinatorial black and the max_fanout constraint applies only to registers . 

Is there a way to constraint the fanouts of combinatorial blocks.
0 Kudos
Altera_Forum
Honored Contributor II
820 Views

Hi, 

 

Synthesis report <project>.map.rpt has "Registers Duplicated to Honor Maximum Fanout Requirements" section. 

It lists all the registers, required fanout and number of duplicated registers created for those registers. 

 

Thanks, 

Evgeni
0 Kudos
Reply