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Hello everyone,
I am working on a university project on which I try to figure out how to program a MAX V CPLD via the IEEE 1532 standard. The according datasheet reads, that there are IEEE 1532-BDSL files on the Altera website, but I don't seem to find any. I've found the 1149.1-BSDL files for MAX V-Devices and 1532-BSDL files up to the MAX II-Family. Since those seem to be very similar for the 1149.1 part (at least for the T100 package), I tried to verify the silicon ID code using the FLOW_VERIFY_IDCODE (silicon), but this didn't seem to work. Could anybody please tell me where I can find (or create) the IEEE 1532-BSDL for MAX V-Devices? (Any further information on this topic, besides what I can find in the datasheets would be very appreciated, too :) ) Thank you very much, AlexanderLink Copied
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In case someone is interested: I noticed a flaw in my design and tried again using the information from the MAX II-IEEE-1532-BSDL file and the FLOW_VERIFY_IDCODE (silicon) and FLOW_ERASE appeared to work correctly.
The correct BSDL-File would still be very appreciated in case it differs at some point. Additional question: I might open a new thread on this topic, but is there any possibility to create an .isc file for the MAX V configuration? Is there a designer with some experience configuring Altera devices using IEEE 1532 ? Maybe I could use a different programming file for this purpose, like .pof or .rbf. Thank you very much again, Alexander
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