Hi ,
I'm trying to develop a RTL state machine in VerilogHDL for remote system upgrade using I2C interface, in a MAX10 (10M16324C8G) device. I have instantiated 'onchip flash memory IP core' in the code for the same.
The configuration mode in the onchip-flash IP is set as 'Dual Compressed images' and clock frequency to be 33MHz.
After un-protecting and erasing the sectors (CFM1 and CFM2) , while programming single page at a time starting from the location 0x08000 (a page size is 4KB for 10M16324C8G) , it works well till the address location 0x13000 . I confirmed it by reading the 'write successful' bit of status register.
But the write/program fails from location 0x14000 on wards.
I'm providing the address in 'avmm_data_address' pin, data in 'avmm_data_writedata' with the 'avmm_data_write' to be high until the flash IP core goes busy. The 'burst_count' is set to '1'. I found that the 'avmm_data_waitrequest' goes low in the 3rd clock pulse after 'avmm_data_write' control pin is set for this address.
Please help me what could be the reason of failure from address location 0x14000 page on wards
Thanks in advance
