testing with MAX10 (having internal ADCs available), I tried to combine in a given I/O bank analog input pins and (almost) static digital I/Os. Quartus currently prevents me from doing that and throws an error message. Obviously I took care to select a unused analog-capable pin for the digital I/O.
Do I do something wrong or is it really not possible to combine analog and digital I/O in the same bank?
when you say analog, you mean some signals like lvds?
to receive analog signals, because you need to maintain the signal quality (linearity, for example), you need analog transceivers in fpga, so you have to use the high speed transceiver banks.
The answer is documented in the MAX10 ADC User Guide UG-M10ADC (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_adc.pdf) in section 2.1.3: If you use bank 1A for ADC, you cannot use the bank for GPIO.