I'm trying to program .pof file in MAX10 (10M04SAU324I7G) of our custom board but it fails.
Programming the .sof file succeeds.
nConfig, nSTATUS and CONF_DONE are pulled high with 10k.
CONFIG_SEL is pulled low with 10k.
I already checked that nConfig is not driven low by any other source.
It seems very strange to me that nStatus is driven low by the FPGA and spikes to 3,3 V every 3 ms.
I am using the "single uncompressed image" configuration and Quartus 18.1.0 Build 625.
Please let me know if you need any further informations to solve this problem.
Hi @DMeck ,
Scene you are able to program the sof successfully, issue is not related to power.
Issue may be due to bit-stream corruption or board design guide lines not followed.
- The nCE, nCONFIG and nSTATUS pins are connected according to the recommended setup in the device handbook. If pull-up/pull-down resistors are required, ensure the resistor values are correct.
- Check the soldering contact in between the FPGA and the board surface.
- The power supplies are ramped up to the appropriate voltage level according to the device datasheet and are stable throughout the operation
- Check if you are using correct pof file while programming.
Please attache images of nCONFIG and nSTATUS under power on state, configuration state & user state.
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
thank you for your respons.
- The nCONFIG and nSTATUS pins are connected according to the recommended setup. Both are connected to a 10k pull-up resistor. I think there is no nCE pin. Please correct me if I am wrong.
- The soldering contacts were checked and verrified with a test program which I programmed with a sof file.
- The power supplies were monitored with an osciloscope. There were no varriations in power supplies.
- The pof file should be correct. I was able to transfer this file to an 10m02SCE144 which I use in an other project.
Attached you can find an image of nCONFIG (C1, yellow), nSTATUS (C2, red) and TDI (C3, blue) while trying to program the FPGA with pof file.
You can see the power on state at the beginning of the image.
The spikes I mentioned above seem to be normal and were observed on the other project too.
I also attached some sectors of the circuit diagram. Maybe you can find an error there.
Is there any other pin that I need to care for or do you have any other suggestion about that issue?
Thank you for your help,
I now found the solution for this problem. There are some level shifter connected to the FPGA. The output of these level shifters is 3,3V and during configuration all I/O pins of the FPGA are connected to GND. All in all the needed current consumption during configuration was to high (> 1A) and got limited by the power supply. So in the end the configuration failed.
I am now confused about the low state of the I/O pins during configuration. According to the "MAX10 configuration guide" these pins should be tri-state during configuration (see https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf, page 28, figure 10).
Is it possible to configure the state of the I/O pins during configuration?
The low state of the I/O pins during configuration is because of
- All I/Os pins are tri-stated with no pull up.
- Initialization Configuration Bits (ICB) stores the configuration feature settings of the Intel MAX 10 device. You can set the ICB settings in the Convert Programming File tool. Set I/O to weak pull-up prior usermode
• Enable: Sets I/O to weak pull-up during device configuration.
• Disable: Tri-states I/O by default it is enabled.
Hi MDeck, did you solved your problem?
I am looking around to solve same problem on my boards.
On your attachment I noted both nConfig and Conf_done aren't pulled up. This can cause programming error I experienced long time ago.