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Manual fitting with chipplanner

agaripcan6223
Beginner
312 Views

Hi, I want to generate metastability-based true random numbers using a model where 256 R - S latches are connected in parallel, as in Figure 1. For this, I have to place the NAND gates that make up each R-S latch core in Figure 2 on a different LE on the FPGA (chipplanner). However, the modeled system is optimized by Quartus at the compilation stage and placed on LEs in a stochastic way. Although I tried hard, I could not get a result. I need your knowledge and experience to solve this problem, which is important to me. For this I need to make any adjustments in the Quartus environment or what method should I follow?

I would be very happy if you could help me.

Best regards.

figure1.bmp

Figure 1. Entropy model

 

 

figure2.bmp

Figure 2. SR latch

 

 

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2 Replies
IDeyn
New Contributor III
166 Views

Hi agaripcan6223 !

 

In order to create such a design you need to exploit hand placing the LUTs.

Have you tried using Assignments - Location -> LAB combinational cell?

Other issue is to create LUT mask to behave as NAND gate - you need to create hand placed LUTs and change their LUT mask using Resource property editor.

 

I also need to say that your design is highly unrecommended in FPGAs, here you create clock gating and combinational loops.

 

--

Best regards,

Ivan

KhaiChein_Y_Intel
166 Views

Hi,

 

You can prevent optimization by setting the preserve synthesis attribute on the register. You may refer to the syntax below.

Verilog: https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#hdl/vlog/vlog_fil...

VHDL: https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#hdl/vhdl/vhdl_fil...

 

Thanks.

Best regards,

KhaiY

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