Thank you for contacting Intel Community.
Please refer to Packaging specification and dimension page for the device package dimension.
assembly tolerance is package outline tolerance.
In datasheet did not state the package outline tolerance.
we need the value to create footprint for CAD.
In the below link (Packaging specification and dimension page), Intel did mention the tolerance for the package outline.
Eg: the min and max value stated in the page is the tolerance for the package outline.
Sorry to let you know that Intel FPGA do not provide support for PCB footprint symbols for FPGA and CPLD device families, similar to configuration devices.
However, we will continue the support by providing the schematic symbol which you can download from the link above. You could have the schematic symbol in .olb format from the link below: