Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20704 Discussions

Max DMA transfer with PCIe Qsys Example

Altera_Forum
Honored Contributor II
1,119 Views

I'm using the PCIe Qsys Example from the Altera wiki. On the main page of the wiki it states that the maximum DMA transaction size is 256KBytes. Why is this? I am writing to DDR (I realize the on chip memory is 256KBytes, and that is the target address in the example). Anything larger than that number causes it to bomb out, requiring an FPGA reconfig and restart the PC. Also, DMA transactions must be in chunks of 32Bytes, otherwise again it bombs out. I can deal with either, but would like to transfer huge amounts of data without splitting the data into multiple transactions, and of arbitrary number of bytes (not necessarily in multiples of 32Bytes). Is that possible, any ideas? Thanks.

0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
395 Views

The read and write masters were configured to handle up to that I think. You can configure the maximum transfer length size in the masters but the larger the transfer size the lower the mSGDMA Fmax will be. It's a scatter-gather DMA so if you need something larger just send multiple descriptors to complete a large transfer as a collections of smaller transfers (that's the whole point of using a SGDMA over a regular DMA). 

 

I'm guessing the 32B multiple requirement is because the "Full words only" feature is enabled which means that the data must be aligned to the word size and be full word accesses throughout the transfer. This is most likely an Fmax optimization as well since that is the fastest configuration of the mSGDMA master cores.
0 Kudos
Reply