Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21142 Discussions

Max V, dual speed grade compile

BDegu
Novice
883 Views

I get a different program file when I compile with the 5M80ZT100C4 and the slower C5 device.  Both speed grades pass timing.  I would like to be able to use either device in manufacturing with the same program file.  Is this possible?  What do I need to do?

0 Kudos
1 Solution
3 Replies
YuanLi_S_Intel
Employee
871 Views

Yes, it is possible. Programming files are speed grade and temperate grade dependent.

https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/solutions/rd02072008_497.html



0 Kudos
BDegu
Novice
843 Views

Thanks for the reply.  I am still curios why it is stated that it is speed grade independent when the program files are different when recompiled with the "4" and "5" speed grades.  I'm just going to use the slower, 5, grade and move on.

 

Best regards, Bryan  

0 Kudos
YuanLi_S_Intel
Employee
833 Views

Hi Bryan,


May i know what do you mean by programming files are different? The size of the SOF generated?

 

Best regards, Bruce


0 Kudos
Reply