Maximum current strength supported by pin SDI_HSMC_CLK for SDI HSMC daughter card

[Altera_Forum]

Hi, 

 Anyone know about the maximum current strength supported by pin SDI_HSMC_CLK(input) for SDI HSMC daughter card? In Quartus II Pin Planner, the default current strength of HSMC connector(HSMB_CLK_OUT_P2) to that pin is 12mA, but I have checked the datasheet of the FemtoClock™ Dual VCXO Video PLL (IC 810001-21), the maximum input high current is 150uA. The default current strength exceeds the current value which is stated in the datasheet (attachment), will it damage the IC?  Thanks.

[Altera_Forum]

No, it won't damage the IC. 

 150uA is the maximum current the device will draw when powered under the conditions stated. Just make sure you have the appropriate I/O standard selected for 'HSMB_CLK_OUT_P2' in the I/O planner. Reduce the drive strength right down and increase it if the wave shape at the receiver looks a little tired.  Cheers, Alex

[Altera_Forum]

--- Quote Start ---  Hi,  Anyone know about the maximum current strength supported by pin SDI_HSMC_CLK(input) for SDI HSMC daughter card? In Quartus II Pin Planner, the default current strength of HSMC connector(HSMB_CLK_OUT_P2) to that pin is 12mA, but I have checked the datasheet of the FemtoClock™ Dual VCXO Video PLL (IC 810001-21), the maximum input high current is 150uA. The default current strength exceeds the current value which is stated in the datasheet (attachment), will it damage the IC?  Thanks.  --- Quote End ---    The 12mA drive strength does not necessary mean that the output current will be 12mA. The output current will be largely dependent on the load. You can try to simulate using IBIS model to check the current in your setup.

[Altera_Forum]

--- Quote Start ---  No, it won't damage the IC.  150uA is the maximum current the device will draw when powered under the conditions stated. Just make sure you have the appropriate I/O standard selected for 'HSMB_CLK_OUT_P2' in the I/O planner. Reduce the drive strength right down and increase it if the wave shape at the receiver looks a little tired.  Cheers, Alex  --- Quote End ---    If the current supply to that pin is not high enough, is it will affect the performance to drive the clock cleaner? As for my case, by using 4mA for that pin, SD format video will have some glitches but not HD and 3G format. This issue is solved when I increase the current strength to 8mA. Any ideas on this? Thanks.

[Altera_Forum]

By increasing the drive strength you will be improving (in your design) the wave shape at the receiver. This is clearly having a positive effect on your design. 

 Cheers, Alex

[Altera_Forum]

It would be good to do signal integrity simulation to select the optimal drive strength for your setup. Lower drive strength will have slower edges. Higher drive strength might get more reflection. Need to balance between.

[Altera_Forum]

For more precious simulation result, you can also try Hspice model if you have the simulator.

[Altera_Forum]

Can find the models at the following link: 

 https://www.altera.com/support/support-resources/download/board-layout-test/hspice.html https://www.altera.com/support/support-resources/download/board-layout-test/ibis/ibs-ibis_index.html

[Altera_Forum]

Thanks, Alex :)

[Altera_Forum]

--- Quote Start ---  By increasing the drive strength you will be improving (in your design) the wave shape at the receiver. This is clearly having a positive effect on your design.  Cheers, Alex  --- Quote End ---    Thanks, Alex :)