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Altera_Forum
Honored Contributor I
907 Views

Memory WRITING issue

Dear, 

I have a procedure (Sort) that read two numbers in each cycle. and return the max and the min. I am reading two numbers from mif file , the problem is that I want to write back the result returned from the PROCEDURE to the same location of the memory that I had read from. I expected it to be in the next cycle but the memory is not able to be inferred " can't infer memory for variable 'ram1' with attribute '"M4K"'. I listed the code below as reference. Many thanks. 

 

 

ARCHITECTURE behave OF min_max IS 

TYPE MEM IS ARRAY(0 TO 15) OF signed(9 DOWNTO 0); 

 

signal ram1:MEM; 

ATTRIBUTE ram_init_file: STRING; 

ATTRIBUTE ram_init_file OF ram1: SIGNAL IS "bits.mif"; 

ATTRIBUTE ramstyle: STRING; 

ATTRIBUTE ramstyle OF ram1: SIGNAL IS "M4K"; 

SIGNAL reg1sig,reg2sig,dataodd,dataeven,minsig,maxsig: signed(9 downto 0); 

 

BEGIN 

 

 

PROCESS (clock) 

variable kk:integer range 0 to 7:=0; 

BEGIN 

IF rising_edge(clock) THEN 

 

 

dataodd <= ram1(2*kk+1); 

dataeven<=ram1(2*kk); 

 

 

reg1sig<=dataodd; 

reg2sig<=dataeven; 

 

 

Sort(Reg1sig,reg2sig,maxsig,minsig); -- THE PROCEDURETAKES TWO NUMBERS AND RETURN TWO , IT WORKS WELL WITHOUT WRITING TO RAM1 

 

 

 

ram1(2*kk+1) <= maxsig; 

ram1(2*kk)<= minsig; 

 

kk:=kk+1; 

 

 

END IF; 

OUT<=maxsig; 

 

 

 

END PROCESS;
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12 Replies
Altera_Forum
Honored Contributor I
98 Views

You can only ever read/write 1 value from a ram in a single clock cycle, not two. Your code reads from 2 locations in a single clock, not possible. You may need to build a ram that stores both values in parrallel if you want to do this.

Altera_Forum
Honored Contributor I
98 Views

The ram has two ports, I succeeded in reading two values together , but I couldn't write on these location when I added  

ram1(2*kk+1) <= maxsig; 

ram1(2*kk)<= minsig
Altera_Forum
Honored Contributor I
98 Views

 

--- Quote Start ---  

The ram has two ports, I succeeded in reading two values together , but I couldn't write on these location when I added  

ram1(2*kk+1) <= maxsig; 

ram1(2*kk)<= minsig 

--- Quote End ---  

 

 

Is that the standard template for dual port ram? 

 

I never use inference so can't answer you but I have this diversion: if you are checking on data stored in mif, why not pre-compute in software to get your mif ready for max/min
Altera_Forum
Honored Contributor I
98 Views

The Quartus created the dual port when you have two reads. The mif data is an example, I need a real time implementation of course.

Altera_Forum
Honored Contributor I
98 Views

Dual ports means each port can do either write OR read on each port in clock cycle, not both.

Altera_Forum
Honored Contributor I
98 Views

See coding style guidelines here: 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/qts/qts-qpp-5v1.pdf 

 

Section 4 (Page 100) 

Memory is section 4.4
Altera_Forum
Honored Contributor I
98 Views

I will read it and check my code. Thanks a lot.

Altera_Forum
Honored Contributor I
98 Views

 

--- Quote Start ---  

Dual ports means each port can do either write OR read on each port in clock cycle, not both. 

--- Quote End ---  

 

 

I added another process,  

ShowResults:Process(Clock,show) 

variable i:integer range 0 to 7:=0; 

begin 

IF rising_edge(clock) and show='1' THEN 

D<=ram1(2*i); 

S<=ram1(2*i+1); 

i:=i+1; 

end if; 

end process; 

 

acmain<='0' when Z=16 else '1'; --Z is a counter to read 16 elements and then stop activating the first process.acmain is in sensitivity list of first process I listed in first post. 

show<='1' when acmain='0' else '0'; 

 

 

So, I activate it when I deactivate the first process , So I can either read or write. However Still unable to infer to memory. What is the best solution for that
Altera_Forum
Honored Contributor I
98 Views

This is because you're still reading or writing 2 locations at the same time - the ram1(2*i) and (2*i+1). You can only read/write 1 location at the time.

Altera_Forum
Honored Contributor I
98 Views

The weird thing is that I am using dual port , in reading these two locations, it . I am using now different memory for each operations , but the number of logic element is so large . Thank you for your reply brother.

Altera_Forum
Honored Contributor I
98 Views

You really need to study the document I provided. If your code doesnt match the template, then a ram will not be infered.

Altera_Forum
Honored Contributor I
98 Views

I did and I am still reviewing it. Thank you very much for your continuous help and notes.

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