Hi,Do you mean different design? Then it's not possible on same .stp file. If it single design you can monitor required signals. it is possible to have multiple SignalTap files for a given project, but only one of them can be enabled at a time. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
I understand the question differently, asking about using different SLD nodes in a design simultaneously. The JTAG SLD architecture is designed for it, you can basically e.g. use signaltap, S&P and in-system-memory editor together, although some restrictions apply, e.g. need to stop S&P transfer before reconnecting a signal tap instance, otherwise the JTAG stack freezes and must be reset.If concurrent operation is also possible with the adv_debug_sys core must be checked, I think there's a good chance. ..... I need to correct the optimistic assumption. Just realized that adv_debug_core connects to USB Blaster through libUSB, so it's unlikely to share it with the Altera USB stack. To do so, it would need to use Altera dlls to interface Altera programming adapters.