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Hi everyone!
I've built a Qsys system with a Nios II and other components. It seems to run the Hello World example just fine until I include a flash memory and a clock crossing bridge. After rebuilding the system, I can watch the processor idle until I try to run Hello World again at which point the whole processor locks up. If I'm running it out of on-chip memory, I can get as far as clicking Run. If I run it out of DDR2 memory which I've proven before adding the flash, as soon as I open the Run Configurations window the processor locks up. The strange thing is that the flash isn't used in the software project at all. Some of the values on the Nios address bus look a little strange to me so I'm suspecting the memory address ranges. I've actually got two clock crossing bridges: one from the processor clock domain to DDR2 full rate clock, and another from the processor clock to the flash clock. Is it correct to map the slave address range of the clock crossing bridge to the range I want the processor to see and then on memory controller, use 0x0 to the upper address range? In the picture, I show the DDR2 clock crossing bridge mapped from 0x08000000 to 0x0fffffff and the memory mapped to 0x0 to 0x07ffffff. For the flash device, I have the bridge at 0x04000000 and the controller itself at 0x0. Has anyone seen this before? Thanks for looking and any help is greatly appreciated.Link Copied
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I found the problem. While I wasn't using the flash explicitly, the software project still contains the driver which was accessing the device. It locked up waiting for the controller to release the bus which wasn't happening. I removed the waitrequest pin from the external interface and it cleared my problem.

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