Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

No byte enable

Altera_Forum
Honored Contributor II
1,656 Views

Hi, 

 

I am trying to create my own component using Avalon-MM. When I am generating sopc system I am getting following error: 

 

Warning: 32-bit master connected to 128-bit slave with no byte enables (cpu/data_master -> mycomp_add/slave) at c:/altera/91/quartus//sopc_builder/bin/europa/europa_utils.pm line 248. 

 

Can anyone suggest how to solve it? 

 

Thanks, 

Mumble.
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
919 Views

Looks like you'd like a different answer than the one you've already been given in another post. 

 

The NIOS data master is 32-bits wide and it isn't going to get any bigger. Now the avalon interconnect fabric will handle adaptation between the NIOS' 32-bit master and your 128-bit slave. However, the way it does this is it addresses a portion of your 128-bit bus with each access. If you don't provide byte enables, each time the NIOS performs a 32-bit write to your slave, 96 of the 128 bits will get written with bogus data. 

 

The solution is to add byteenables to your slave. 

 

Jake
0 Kudos
Altera_Forum
Honored Contributor II
919 Views

Correct, thats the only solution. 

Only byteenable signals tell the slave which byte (bits) should be modified and which should keep their content.
0 Kudos
Reply