Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Noise decoupling

Altera_Forum
Honored Contributor II
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I am giving RF power which is dc through terasic daughter card adc/dac to altera DE2-115 fpga but i am not able to see the dc in signal tap analyzer . it is showing some noise . So is there any way if i can block that high frequency noise component so that i can see the smooth dc in STA. I need to read the bit value of that particular dc signal which is not stable and changing forever.

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