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Honored Contributor I
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Not correctly read silicon ID from the EPCS64.

Hi. 

For access with EPCS64 from Cyclone IV I use IP-core ALTASMI_PARALLEL. 

When I read silicon ID from the EPCS64, epcs_id[7..0] = 0x0B (0000.1011), but should be 0x16 (0001.0110). 

 

The clock frequency of ALTASMI_PARALLEL - 20 MHz. 

 

I brought on SignalTap epcs_id[7..0] and read_dout_reg[7..0] (the shift register of the ALTASMI_PARALLEL). 

After reading the silicon ID on Signal Tap epcs_id[7..0] = 0x0B, read_dout_reg[7..0] = 0x16. 

 

There is an assumption that the value on the bus epcs_id[7..0] is latched on the 1 cycle before. 

 

Has anyone such a problem?
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