Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21612 Discussions

Opencores MAC 10/100 Driver

Altera_Forum
Honored Contributor II
4,683 Views

Hi Everyone 

 

Please feel free to use these files and/or comment on them. I've written them as a driver for the opencores mac solution. I have been using them with the lwip web server example that comes with the nios II installation and they seems to work. 

 

I've attached a zip file with three files in it: 

OpenCores_Ethernet_MAC_regs.h - contains the definitions of the registers inside the opencores MAC component. 

OpenCores_Ethernet_MAC.c and the matching h file is the actual driver. 

 

I've used these files in conjuction with files that come with the Nios installation, which I can't post here for obvious reasons. What I did was to make a copy of the altera_avalon_lan91c111 directory, name it accordingly and replace the file in the HAL\inc and HAL\src as well as the regs file in the inc directory with the file I've attached. I hope this helps someone. 

 

Nir
0 Kudos
24 Replies
Altera_Forum
Honored Contributor II
621 Views

 

--- Quote Start ---  

originally posted by nir@May 17 2005, 02:38 AM 

sorry for that. 

 

here it is 

<div align='right'><{post_snapback}> (index.php?act=findpost&pid=6961) 

--- quote end ---  

 

--- Quote End ---  

 

 

Hi Nir, 

 

I cant download the file, can you please upload it again... 

Ragrmn
0 Kudos
Altera_Forum
Honored Contributor II
621 Views

I am using the MaCo Wishbone to Avalon interface for Opencores MAC. I see that it does not connect thru a Avalon Tristate Slave, but connects directly to the NIOS core. Can i still use this driver?  

 

thanks in advance, 

Raghu
0 Kudos
Altera_Forum
Honored Contributor II
621 Views

analysis of the freeze problem 

 

I have tested the driver with both a DP83847 PHY and DP83848 PHY and I have found a bug causing the program to freeze. I have tested it with the lwip web server demo, using lwip-0.7.1. 

 

The way to make the program freeze is to ping it while repeatedly requesting a web page from it (e.g. using a while loop with curl in cygwin). In less than a minute, the program will stop responding to ping. 

 

I have done some analysis and come to the conclusion that it has something to do with interrupts. alt_avalon_opencores_mac_irq() handles interrupts of source RXE and BUSY, but ignores TXE interrupts. 

When the program is stressed, it receives a TXE interrupt, which is not cleared. Since it is not cleared, the MAC component seems to issue another interrupt and we have starvation. 

 

I tried to disable TXE interrupts in g_int_mask_contents, which improved the situation. The program no longer freezes, but after a while (sometimes almost 30 minutes), the program stops responding to pings and http requests. It still enters the opencores_ethernet_mac_output() function (which I am able to see in printf&#39;s I have inserted), but no response is sent to the pinging host. 

 

Restarting the program does not help, I must reset the FPGA. 

 

My guess is that the MAC component gets incapable of transmitting since its transmit buffers are filled with erroneous TX data. 

Does anybody have any pointers to how to properly handle the TXE interrupts, equivalent of how the RXE interrutps are handled.
0 Kudos
Altera_Forum
Honored Contributor II
621 Views

Thanks.

0 Kudos
Reply