Output voltage doesn't match settings

[Altera_Forum]

Hello! 

I'm using altera cyclone II DE1 EP2C20F484C7. I've set default I/O to 1.8V, set ALL I/O bank's Vccio to 1.8V. Also I'm using expansion slot. Then I have measured voltage on expansion header's pins by a multimeter and there is 3.3V. I thought that I would get 1.8v. What I am doing wrong?

[Altera_Forum]

--- Quote Start ---   What I am doing wrong?  --- Quote End ---  You're expecting magic.  The FPGA I/O constraints must be set to match the I/O voltage (VCCIO), it does not happen the other way around.  You need to check the DE1 schematic and then match the constraints to the schematic.  Its quite possible that the board has a jumper to set the VCCIO for the GPIO header. You would also be able to find that in the schematic.  If you cannot figure out what you are looking for, post the DE1 schematic and I'll look at it for you.  Cheers, Dave

[Altera_Forum]

Thank you. You are right about magic, I suppose. The board hasn't any jumpers.  

  --- Quote Start ---  The FPGA I/O constraints must be set to match the I/O voltage (VCCIO), it does not happen the other way around.  --- Quote End ---   Sorry, but I don't understand =(  altera.com/education/univ/materials/boards/de1/unv-de1-board.html?GSA_pos=1&WT.oss_r=1&WT.oss=de1  Reference Manual - db.tt/ptDzPht User Guide - db.tt/YE9hEsDo Shematic - altera.com/products/devkits/altera/documents/cy2_fpga_starter_board_schematic.pdf  And you are right - I don't know what to look for =(

[Altera_Forum]

--- Quote Start ---   And you are right - I don't know what to look for =(  --- Quote End ---  That's ok, everyone has to start somewhere.  The problem you are facing, is that the FPGA handbook tells you all the different voltages the I/Os can be operated at, and the Quartus II software must support all those modes. Once an FPGA is physically placed on a board, its VCCIO functionality is reduced to whatever the board supports; often its only one voltage. You then need to provide this information to Quartus II so it can program the I/O buffer logic correctly; this is a constraint.  Here's how you figure it out what VCCIO voltage setting is on your board;  1. You indicate you want to use the GPIOs, so first you find them in the schematic - pages 16 and 17. The signals are called IO_xx at the connector, and then GPIO_xx at the resistors.   2. The GPIO_xx signals come from the FPGA. Go look on pages 9 and 10. The signals come from BANK4, 5 and 6.  3. Now go to page 12, where the power pins for the FPGAs are. Notice how the VCCIO signals have numbers after them. These are the BANK numbers. You can see that they are all connected to a power rail called VCCIO.  4. Change to page 20. Look for VCCIO. It is connected to VCC33.  So, the GPIO bus, and all other I/O signals on the FPGA are powered at 3.3V.  Cheers, Dave

[Altera_Forum]

Thank you a lot! You have saved the day =) 

Ok, so I will connect resistors to lower voltage, I think

[Altera_Forum]

--- Quote Start ---   Ok, so I will connect resistors to lower voltage, I think  --- Quote End ---  A resistive divider should be ok if you are driving a signal from the DE1 to the 1.8V logic, however, the 1.8V logic will not be able to drive a valid high back to the 3.3V logic. For that, you need a level translator.  If you were designing your own FPGA board, then you could power a VCCIO bank at 1.8V and connect it directly to your 1.8V logic. However, the DE1 does not provide a 'simple' way of changing the VCCIO. I did notice that there was a jumper from VCC33 to VCCIO. You could remove that and power VCCIO from 1.8V, but since there is already logic on that power rail, the other components would stop working (which you might not care about).  Cheers, Dave

[Altera_Forum]

I work on student project - UICC terminal on DE1. Simple sim cards have several operation mode - class c (1.8v) and class b (3.3), but specification says that 3.3V is maximum, so I think I must lower voltage to, say, 3.2V for better compatibility with 3.3V sim cards. It would be easier, than implement level translator for class c operation mode.  

And thank you, again. Great community I've found here.

[Altera_Forum]

--- Quote Start ---  I work on student project - UICC terminal on DE1. Simple sim cards have several operation mode - class c (1.8v) and class b (3.3), but specification says that 3.3V is maximum, so I think I must lower voltage to, say, 3.2V for better compatibility with 3.3V sim cards. It would be easier, than implement level translator for class c operation mode.  --- Quote End ---  There are dual-power-rail level translators from Texas Instruments and others. On one side you power it at 3.3V from the DE1 expansion header, and interface at 3.3V, and then on the other side, you power it from 1.8V or 3.2V for interfacing to the sim card. You're going to need a socket anyway, so you may as well put the buffer in there too. You might even find a sim card PCB assembly with the connector and the level translators. Take a look on the web and see if you can find something.  Cheers, Dave

[Altera_Forum]

Placing a schottky diode of sufficient current capability instead of the jumper R30 to reduce VCCIO to about 3.0V should work.