Hi,I'm looking for information on transferring data from a PC to DE2-115 through USB for a class project that I'm working on. Specifically, I have a grayscale image that I want to transfer to the FPGA, run some processing algorithms on the FPGA and output the processed image through the onboard VGA. I've tried working through the USB_DEVICE demonstration but there is no accompanying documentation that explains what the code does and how it is structured. What are the best resources I can use to understand FPGA communication with PC host on the DE2? Thanks!
You can use:- JTAG UART (low performance but very simple with NIOS and Altera IP) - Gigabit Ethernet (very difficult, require understanding of timings, etc.) or for good performance (40MByte/s) you can add an external USB to FIFO module like UM232H to exploit USB 2.0 performance. This require some work. A simpler way is to add an external USB to UART external module (typ 115.200 bps/s).
Thanks for the suggestions. Performance isn't a concern yet, so JTAG UART will also work for me. But so far all I've been able to use it for is to receive character data from NIOS II on a terminal. I want to be able to write a C/C++ program that will transfer the bit-array of the image to the FPGA. How can I accomplish this with JTAG UART?Also, are these external modules that you mention (UM232H and USB to UART) additional circuitry or IP Cores that can be added in Qsys?
It is difficult to interface JTAG UART with a custom C/C++ program. I prefer to use USB to UART module in this case.External modules are board that you can connect to DE2, like UM232H: http://www.ftdichip.com/support/documents/datasheets/modules/ds_um232h.pdf. If you use USB to UART like UM232R http://www.ftdichip.com/support/documents/datasheets/modules/ds_um232r.pdf you can use "altera avalon uart" IP core after doing right connections with DE2. With UM232H you have to write your IP core to interface module to system.
The DE2-115 board features a 'USB Device' port (J10) for connecting your board, via USB, to a PC (or other host). I don't think you need any additional boards/circuitry to accomplish what you're trying to do.Look through the 'USB Device' example that comes with the DE2-115 board, covered in section 6.4 of the user manual (http://www.terasic.com.tw/cgi-bin/page/archive_download.pl?language=english&no=502&fid=cd9c7c1feaa24...). This talks you through the example - connecting the board to a PC, installing the relevant driver (for either a Philips ISP1362 or a Cypress CY7C67200, depending on the revision of your DE2-115 board) and running up the software that interacts with the example running on the FPGA. Providing your C/C++ program can interact with the driver, then you'll be able to push and pull data to/from the FPGA in a similar manner to the example. Cheers, Alex
I don't have a DE2 but using CY7C67200 I don't think is so easy but if you have a working example.. just use it. Maybe just using UART with CY7C67200 is simple, you have to check.
Forgive me - I've just re-read you first post about trying the USB Device example. I agree - there is little (no) documentation. So, if your not comfortable unpicking the example code - perhaps not.--- Quote Start --- transferring data from a PC to DE2-115 through USB --- Quote End --- Is the "USB" a requirement? If so, then I agree with flz47655 - an external FTDI solution means you just end up with an emulated serial port on your PC to communicate with. If "USB" is not a requirement then there is a straightforward serial port on the DE2-115 board. That's as simple as they come. Cheers, Alex
Thanks for the suggestions. I'll look into the FTDI solution for serial communication.I have also found an example that does exactly what I want using the JTAG_Atlantic library but on a different FPGA. I'll look into adopting it in my project and see how it works, but if you know of any better solution I'd love to know how that works.
JTAG UART is thinked for debug, using JTAG_Atlantic is not a clean solution.. I think you have to rely on undocumented/unofficial library.Another solution is create a TCL server: http://idlelogiclabs.com/2012/04/15/talking-to-the-de0-nano-using-the-virtual-jtag-interface/