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Hi All,
I am using a DE5 board from Terasic. It has a PCIe gen2 interface. The original design uses hard Reset Control, while the new version of the quartus forces me to switch to the Soft Reset Control. The design can be compiled successfully. However, when I downloaded the design into the FPGA and reboot the computer, it doesn't work. The computer could not be booted anymore. Need help to fix it. BR, MarkLink Copied
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--- Quote Start --- Hi All, I am using a DE5 board from Terasic. It has a PCIe gen2 interface. The original design uses hard Reset Control, while the new version of the quartus forces me to switch to the Soft Reset Control. The design can be compiled successfully. However, when I downloaded the design into the FPGA and reboot the computer, it doesn't work. The computer could not be booted anymore. Need help to fix it. BR, Mark --- Quote End --- I have got the same problem. I am using the Stratix V chip and the latest software 14.1. Have you solved the problem? Can't believe Quartus II have such obvious problem. Haven't the engineer done some testing before they release the product?

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