Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Altera_Forum
Honored Contributor II
‎09-19-2008 05:34 PM
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Hi, 

 

I am using the NiosII Evaluation kit (Cyclone III) (EP3C25F324C6) .. 

 

I did a project where I am using on board SSRAM . While I am assigning the pins to the data bits 0 and 1 .. It is showing an error that the pins were (1 & 0) were already used ..  

 

But those two bits are very important for me ...  

 

Is there a way to overcome this error..  

 

Please suggest me what to do .. as soon as possible ..  

 

Waiting for a reply. 

 

 

-Srinath.
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Altera_Forum
Honored Contributor II
‎09-19-2008 06:52 PM
297 Views

Well Srinath, how about posting the error on the forum so we can see it. 

 

I'm just going to guess though that you are violating the restriction in Cyclone III that states you are not allowed more than a certain number of I/O pins within a certain vicinity of a VREF pin. 

 

If this is the case, then you need to remove one of the unneeded I/O signals from your design. There is probably an LED output that you can remove. 

 

Jake
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