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Hi,
I want to know a PLL related quary.. Each PLL of ARRIA II GX FPGA has a fan out of 7. Can those 7 outputs be independently configured? Specifically, I mean can I use LVDS I/O standard on one PLL output and LVTTL on another output line of same PLL?Link Copied
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--- Quote Start --- Hi, Specifically, I mean can I use LVDS I/O standard on one PLL output and LVTTL on another output line of same PLL? --- Quote End --- Yes, you can. The I/O standard will be determined by choosing the right I/O buffer, no by the PLL or any other internal component. -- Ton

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