Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Altera_Forum
Honored Contributor I
1,118 Views

Pin matching issue on my Cyclone V GX Starter Kit

Hello everybody, 

I bought a Cyclone V Starter Kit (not the Development Kit) because I want to experiment digital electronics from simple logic gates and gradually the FPGA world. As I compile my design using pin assignments from "Default" demo project (I cannot find a standard pin assignments), the compilation stops and these errors come out in compilation console: 

 

Error (171016): Can't place node "LEDR[1]" -- illegal location assignment PIN_F6 

Error (171016): Can't place node "LEDR[3]" -- illegal location assignment PIN_G7 

Error (171016): Can't place node "SW[0]" -- illegal location assignment PIN_AC9 

Error (171016): Can't place node "SW[1]" -- illegal location assignment PIN_AE10 

Error (171016): Can't place node "SW[2]" -- illegal location assignment PIN_AD13 

Error (171016): Can't place node "SW[3]" -- illegal location assignment PIN_AC8 

Error (171016): Can't place node "SW[4]" -- illegal location assignment PIN_W11 

 

Pins assignments are like in instruction manual PDF supply with "System CD". What's wrong? What shall I do?
0 Kudos
3 Replies
Altera_Forum
Honored Contributor I
78 Views

The only thing I can think of is that you are not targeting the exact device on that board. Make sure the device in your project is set to 5CGXFC5C6F27C7N.

Altera_Forum
Honored Contributor I
78 Views

 

--- Quote Start ---  

The only thing I can think of is that you are not targeting the exact device on that board. Make sure the device in your project is set to 5CGXFC5C6F27C7N. 

--- Quote End ---  

 

 

Hey, it can't be real...I've switched to it...I've imported pin assignments from "default" project (they match with the manual) and now everything is OK. Thanks.  

 

Now...I'm noticing that with programmer in JTAG mode, design goes away with the power-off of the board. What shall I do to load my design into the Cyclone? 

 

Thanks again.
Altera_Forum
Honored Contributor I
78 Views

You program the device again. That's how FPGAs work. They have SRAM cells that store the design configuration until you power cycle. You either program it over JTAG again or put the programming bitstream file into a non-volatile memory (like flash) and set up the device to automatically program itself (or let another device manage the programming) at power on.

Reply