I have a simple platform designer system containing a NIOS, a custom component, an Avalon-MM bridge and an IRQ bridge. When I generate the HDL files for this system everything works without error.
However, when I try to generate my BSP using Eclipse, the IRQ bridge does not appear in the file system.h.
Moreover, when I generate the .tcl file for my qsys design, I have noticed that the interrupt sender port of the irq brige are instantiated as input. What can I do?
You will find the files mentioned here above as well as a screenshot of the qsys design attached to this post.
I am using quartus prime pro 20.2.
Thanks in advance for your help.
In an old Qsys manual, I found a note:
Nios II BSP tools do not fully support the IRQ Bridge. Interrupts connected via an IRQ Bridge will not appear in the generated system.h file
I think if you really want to use that module, you'll have to make some #defines yourself. As an alternative, you can use a PIO module with an interrupt as a workaround.