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Hello people,
I tell you my serious problem I have programmed a state machine in VHDL. This state machine works with an external clock´s pulses. Simulation is OK. When I see waveforms in oscilloscope, usually the MAX II works correctly but when one of the inputs change at the same time that clock (both slopes are at the same time) the output has an anormal state during one clock`s period. I made the same test with the internal oscilator and I have the same problem. I don´t know if this problem is normal or not. Could be a problem of compilator of QuartusII? Thank you very much!Link Copied
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You have to synchronise asynchronous external inputs with a 2-stage register chain before letting it interact with the state machine.
You may want to look up 'metastability' to learn what can/will happen otherwise.- Mark as New
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Thank you very much for you response,
What do you want to say with 2-stage register? Thanks!- Mark as New
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http://www.altera.com/literature/wp/wp-01082-quartus-ii-metastability.pdf?gsa_pos=3&wt.oss_r=1&wt.oss=metastability (http://www.altera.com/literature/wp/wp-01082-quartus-ii-metastability.pdf?gsa_pos=3&wt.oss_r=1&wt.oss=metastability)
http://www.google.be/url?sa=t&source=web&cd=10&ved=0cfmqfjaj&url=http%3a%2f%2fwww.inf.ufrgs.br%2f~fglima%2fmeta-estabilidade.pdf&ei=6u0btemamdczhafb3fw2dg&usg=afqjcnh0yrwpvzeqft1kkgpywv5zn0pdlq&sig2=q0wy30e_m7wsfzvkzonkya (http://www.google.be/url?sa=t&source=web&cd=10&ved=0cfmqfjaj&url=http%3a%2f%2fwww.inf.ufrgs.br%2f~fglima%2fmeta-estabilidade.pdf&ei=6u0btemamdczhafb3fw2dg&usg=afqjcnh0yrwpvzeqft1kkgpywv5zn0pdlq&sig2=q0wy30e_m7wsfzvkzonkya)
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