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Altera_Forum
Honored Contributor I
971 Views

Problems with JTAG programming

Hi all, 

 

I'm trying to program CPLD EPM3064 (Max 3000 family) with quartus and USB Blaster. 

 

The problem is that I can program when the CPLD is in Blank (without anything inside). But then, I can't do anything else. I can't erase or read or verify, anything.  

 

If anybody knows something about that... Thanks!
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3 Replies
Altera_Forum
Honored Contributor I
81 Views

Hi tito14, 

I would recommend to check the older forum post: http://www.alteraforum.com/forum/showthread.php?t=30225 

Especially the response from FvM. 

 

Regards, 

Martin
Altera_Forum
Honored Contributor I
81 Views

Hi Martin, 

 

Thanks for the reply. I read this post already, and also I read that there's this pin OE1 (high voltage pin during programming). 

 

I tried with my CPLD and I just broke it down. My test was put there 11V when I was programming.  

 

Regards, 

Albert
Altera_Forum
Honored Contributor I
81 Views

Hi Albert, 

I'm sorry to hear it. I assume the reason is in putting of high voltage in inappropriate time during device programming. I can't imagine that you are able to put the voltage at the right time according to manufacturer pgm algorithm. I think it is a job for a device programmer such as Altera Programming Unit APU or the 3rd party programmers from BPM, Data IO, Elnec or System General. 

 

Regards, 

Martin
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