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Programming non volatile memory of FPGA Devkit - Intel Arria 10 soc devkit

MK_ABQ
New Contributor II
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Hello,

I have an Intel Arria 10 soc devkit (Arria 10 GX devkit - DK-DEV-10AX115S-A)

I have success with programming a basic sof and have seen its behavior. I would now like to program the volatile memory in the devkit so that FPGA can boot up once I power of and power back on.  I am not sure on which options to pursue.

1) Should I use .pof or .flash for this goal?

2) should I program the cpld and flash to achieve this?.

3) There are different modes specified in the user guide ( Active serial, passive serial , jtag mode). 

I couldn't get a clear picture from the user guide and not sure which way/mode to follow. 

can someone kinda throw some light on this?

 

Thanks

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NurAiman_M_Intel
Employee
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Hi,


May I know is this the userguide that you are referring to?


https://www.intel.com/content/www/us/en/docs/programmable/683269/current/programming-volatile-or-non-volatile.html


Regards,

Aiman


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NurAiman_M_Intel
Employee
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Hi,


Is there any update for this case?


Regards,

Aiman


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MK_ABQ
New Contributor II
670 Views

Hi, 

I was able to program .jic using active serial mode. 

SW5 ( MSEL (2:0)) = 010 for Active Serial Fast mode

SW4.2                     = ON to disable Max V from the JTAG chain

SW6.4                     = OFF to load user image from flash.

couldn't figure out .pof solution yet. but this ticket can be closed now. 

thanks

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FvM
Valued Contributor III
657 Views

Hi,
there's a similar thread about .pof programming of this board, however not yet solved. https://community.intel.com/t5/Programmable-Devices/Flash-memory-not-detected-Arria-10-Development-kit/m-p/1534599
Selecting AS configuration works for this board because it has dual configuration flash, PP + AS.
AS configuration may be too slow to get PCIe recognized at power-on, depending on BIOS Features. Therefore PP may be preferred.


I don't have this board and can't tell if MAX V PFL implementation supports .pof programming, it basically should.


You may also want configuration update without USB-Blaster being involved. In this case, flash update has to be implemented in Arria 10, either in HDL logic or soft processor.

NurAiman_M_Intel
Employee
581 Views

Hi,


Thank you for your response. I will proceed to close this case for now. However, you are always welcome to post a new case in the forum or open an IPS(as you have IPS account) if you need further support.


Regards,

Aiman


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