Quartus 17 position of symbol labels different for VHDL and block diagram/schematic

[Altera_Forum]

When I create a symbol from a VHDL file, the labels are lined up with the pins properly. (center aligned) 

But when I create a symbol from a block diagram/schematic file, the labels are below the pins.  The pins are aligned at the top of the text. This can become confusing when there are a lot of pins. (see attached file)  Can this be changed, such that the block schematic symbol is similar to the vhdl symbol?

[Altera_Forum]

Hi, 

 Yes,It may be bottom alignment by default in case of "symbol from a block diagram/schematic file". Can be changed/edit it manually(By using edit selected symbol option).  Let me know if you need any further assistance.  Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)

[Altera_Forum]

I did not find where I can set the alignment of the labels in the symbol (bsf) editor. 

Could you point out where to find it?  Trying to move the labels by hand is terrible: Just selecting a label, already moves some labels to another position. Also moving the label to the right position cannot be done as the label snaps to certain grid positions, and no position is certer aligned like in a symbol created for a VHDL file. Even if the Option for the Block/Symbol editor 'Snap to grid (applies only to Symbol Editor)' is unchecked, the labels snap to grid.  Also when I try to edit the symbol for a VHDL file, once I move the label, it even cannot be moved back to the original position. (only with undo) When the size of the label outline is changed, the labels move too. Changing the outline back to the original size does not work either. Has anybody ever tried editing a symbol? It does not work for me at all.