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Altera_Forum
Honored Contributor I
1,231 Views

Quartus 2 and .LVDS

I have an easy question for one of the experts. I am using Quartus 2 13.1 and trying to program a Terasic DE3. This is the board with the 4 HSTC connectors, connected to the pads that support LVDS. Here's what I did: 

 

In Verilog I instantiate an input that will come in as LVDS, and an output that goes out single ended on a QPIO pin (to be viewed on a logic analyzer) in the top level module top.v 

 

module top ( 

output qpio, 

input top 

); 

 

 

assign qpio = top; 

endmodule 

 

I then select Processing/Start/Start Analysis & Elaboration and then go into the Pin Planner. I set the pin for the input pin "top" to a legitimate differential pin, and set the I/O Standard to LVDS. The Pin Planner automatically inserts the negative pair for that pin also as LVDS, which is what I expect. I also select the pin for "qpio" as 3.3V. So far so good. 

 

When I compile it, it works fine. However, I also want to set the internal resistance to 100 Ohms. So I look in the Pin Planner, and there's a column called "Input Termination", which looks promising, but when I click on it to see what the options are, all I see are things like "Off", "Parallel 50 Ohm with Calibration", then a bunch of "Series 25 Ohms..." options, 40, 50, and 60, but that's it, nothing that says "100 Ohms" or the option "Differential", which is what I had expected. How do I get it to put 100 Ohms across the pair? 

 

Also, is it correct that I do not need to instantiate a differential IO buffer in my Verilog? I'm assuming that is the case, since there is no "n" input to route to it anyway.
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5 Replies
Altera_Forum
Honored Contributor I
21 Views

You did everything correctly. The available termination options for LVDS input are "differential" or no termination. Differential is 100 ohm.

Altera_Forum
Honored Contributor I
21 Views

 

--- Quote Start ---  

You did everything correctly. The available termination options for LVDS input are "differential" or no termination. Differential is 100 ohm. 

--- Quote End ---  

 

 

Thanks. But how come for some pins I select LVDS as the I/O Standard but the termination options do not include “Dofferential”? They only include the others as detailed above? Under what circumstances does the tool do this? 

 

thanks again!
Altera_Forum
Honored Contributor I
21 Views

Can you give an example for which DE3 LVDS pin pair (device type, pin id) it's not possible? The only reason I can think of is that the respective input doesn't provide termination, see Stratix III hardware handbook.

Altera_Forum
Honored Contributor I
21 Views

Hi. Sorry for the delay. 

 

The pins that allow "Differential" termination are on I/O Bank 1A, but the pins that do not are on I/O Banks 8B and 8C. 

 

Thanks again!
Altera_Forum
Honored Contributor I
21 Views

Device handbook tells you that differential termination is only available on row (left/right) IO banks.

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