Hi,I was trying to follow the 'Data Mover' tutorial on the 'rocketboards' website. In particular, I was trying to add a (time-limited) sof file as an input for the SOF data. However, it looks like the programmer failed to load my sof file. A warning dialog box showed up in the attachment. Can I ask you what I should do to work around this issue please ?? I can provide more information if needed as well... Thanks, TH
Hi there,Basically, the Covert Programming File window failed to let me add an SOF file. Also, the dialog box mentions something like the following: "File !@#$%^&*()_.sof contains one or more time-limited megafunctions that support the OpenCore Plus feature that will not work after the hardware evaluation time expires..." So, what should I do now ?? Thanks, TH
FPGA configuration files containing time limited IP are for evaluation with direct JTAG connection only and don't run when loaded from configuration memory. Thus generating jic file is useless. Quartus programming file converter knows about and stops operation.