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Quartus takes too long to programme flash memory

Altera_Forum
Honored Contributor II
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Hi everyone 

 

I have recently started using quartus II web edition to programme my FPGA. I have a flash memory connected to the FPGA on its development board. The VHDL architecture that I am trying to programme on the FPGA is relatively small but due to the fact that Quartus fills the unused memory locations with zeros it takes ages to programme my device. 

I was wondering if anyone knows a way to disable this setting that initialises all the unused memory addresses to zero hence speeding up the process of programming the device 

 

Many thanks 

 

Sam
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Altera_Forum
Honored Contributor II
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I guess, you are using JTAG indirect programming witha *.jic file? Generally, Quartus is not writing unusd locations of the flash memory as far as I'm aware of. Did you activate compression of the configuration image in the Programming File Converter tool? Otherwise, Quartus will always write the maximum configuration file size independent of the logic resource utilization.

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danduan
Beginner
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Hi, Altera_Forum,

1. How to calculate the time of Quartus programme flash memory ?

2. I use pof file to programme, it is very slow. Cpuld you give some advices to speed up in  AS mode ?

 
 
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