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Honored Contributor I

Question about boot NIOS from Micron N25Q flash

Hi all, 

I am using arrow cyclone v soc kit, with a Cyclone V 5csxf6d6f31c6 chip which has a hardcore ARM-A9 inside. but i am not using this arm core, i am just working with nios purely on fpga side. Also, I am working with quartus 14.0 web edition. 


For the FPGA part of the development kit, it has a n25q256 qspi flash (256 mb) connected to its active serial port. And this is the only flash for FPGA part. I set MSEL[4:0] to 10010, which is AS(x1 and x4) fast mode. The board doesn’t have dedicated 10-pin JTAG or Active Serial port, it uses USB-Blaster port. 


The EPCQ connection is listed in figure "kit diagram” and “as port schematic”  


What I am doing is a very simple project, just controlling LED flash on board using NIOS, according to this tutorial: 

I finished the system setup chapter, the qsys setting of which is listed in the figure ofqsys setting”.  

I list here some settings of the qsys component in case it is helpful: 

(1) I use NIOS-II/e processor, 

(2) I added a ‘EPCS/EPCQx1 Serial Flash controller’ module in my qsys system for EPCQ programming, and its setting is “Automatically select dedicated active serial interface”, as you can see in figure “epcs controller setting”。 I then followed the tutorial on software part, and everything’s fine. i downloaded the .sof (using quartus programmer ) and .elf file (using run as – nios hardware), and the led flashes here! 


however, the problem comes when i want to burn the program to the flash. The followings are what I have done: 

(1) First download .sof using Quartus II Programmer in Eclipse IDE; 

(2) NIOS II Flash Programmer – New – add my .sopcinfo file, as in figure "flash programmer 1"


(3) Check Connection. Here I find that the Device information shown is “5CSEBA6 5CSEMA6”, as illustrated in figure "flash programmer 2".  

However, the chip for my board, and in my Quartus project setting is 5csxf6d6f31c6. 


(4) Add the .sof file and .elf file, and in the Options tab of Flash Programmer, click all items. Then click start, as illustrated in figure "flash programmer 3".  


Then I can see there is erasing, programming from 1% to 100%, and final result show in figure "final". and here, the led starts flash correctly

but when i un-plug the power cable and re-plug it, the led doesn’t flash anymore. and it looks like the hardware even doesn’t start up. 


I would appreciate any help~~~
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8 Replies
Honored Contributor I

The forum only allows 4 pictures per post. So I upload the remained pictures here. 


Picture "Flash Programmer 2"  


Picture "Flash Programmer 3"  



Picture "Final"
Honored Contributor I

So it seems like directly after the flash programming, without re-power up the system, the system can boot up correctly. However, when the power is off, and on again, the system can boot up.  


Thanks again for your time reading the post, and possible suggestion~~
Honored Contributor I



Hello Momxinduo, 

Some suggestions based on my own experience: 

- First i would try to reprogram my FPGA without the Nios configuration: for example make a blink application in VHDL download it and try to run it from ram. 


- Then i would try to do this with the Eprom.  

=> I did the same where i reconfigured the default application with on my DE0_CV. Programming the EPROM is done with a .POF file not with a .SOF file (in my case). So you have to convert a .sof to a .pof before sending it to the EPROM. 


- Then, if you want to do this with Nios-II, i have not done it but, for Nios II to run by it own you need a licence. Therefore this will not work with Quartus Lite. I do not know wich version you have but Nios II does not run from Quartus Lite unless there is a connection between Quartus and your board. 


Best Regards, 


Honored Contributor I

Hi Johi, 


Thanks for your reply. 


I downloaded a .jic file of LED Blinking and the board can boot successfully, so the flash chip should work fine. Since the board uses usb-blaster, it doesn't support .pof, but .jic only. 


For the NIOS part, I tried Quartus in my company with license, but the same result. It can boot directly after programming, but when you power down and up, it can't boot. 


Honored Contributor I

If your nios application works as expected if you program it into the FPGA to run immediately, but not when you boot it from EPCS, you are most likely not setting the boot vector right. (for the flash variant) 

For boot from flash you need to set the boot vector to the flash device. 


Reason: Your NIOS "logic part" gets loaded from flash first and when it gets clocked and out of reset, the software needs to start somewhere. If if boots from onchip_mem (most likely initialized to 0x0), then your application is not loaded. If it boots from flash, Quartus puts per default a bootload in there, which loads your application and then runs it. 


Hint for boot check: Use two LEDs: one that is entirely blinking because of VHDL code (or Verilog, ...) and one because of NIOS.
Honored Contributor I

Hi Markus09, 


Thanks for your suggestion. 


I have tried what you have pointed out: 

(1) First change reset vector to flash, as below  

(2) Then program using NIOS flash programmer, with settings below  


The same result as before. It can boot and run immediately after flash programming, but can't boot up after power down and up, and the CONF_DONE signal is low. 


however, i found that, although it can't boot up, if i just download the .sof file here, it can boot and run, led flashes. i don't need to "run as" the software part as before for system to run

It means actually the FPGA logic isn't programmed into the flash, or it is the FPGA logic that can't boot up, right? Can you help me take a look at the picture of NIOS flash programmer setting to check whether my setting is correct? 


I will try using separate LED, one in FPGA logic and one in NIOS. But it seems that the problem is how to make FPGA logic boot, noy the FPGA logic itself. 


Thanks so much for your suggestion~~
Honored Contributor I

the pictures look ok to me for EPCS boot. 


"[...] the CONF_DONE signal is low." would indicate to me that the FPGA is not reading the EPCS data right; (assuming that JIC programming did a "verify" of the data and was ok) 

did you set the MSEL pins right (SW6 acording to the SoCKit User Manual, page 13 and 14)?
Honored Contributor I

I have set MSEL[4:0] to 10010, which is AS(x1 and x4) fast mode. 

I also tried a pure FPGA logic controlling LED, and generated .jic files using ASx1 and ASx4 mode. Both of these two .jic files can work correctly. So the data path between FPGA and the N25Q256 should be fine.