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Question about some features in product table

CHung
Novice
177 Views

Hi,

In stratix 10 product table,

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/pt/stratix-10-product-table...

There are some features such as

1. LVDS pairs 1.6 Gbps

2. GXT full duplex transceiver

3. PCI Express* (PCIe*) hard intellectual property (IP) blocks

How to understand the meaning of the number?

For example, we have a SX 2800 development board, 

and there are 4 PCIe blocks, 576 LVDS pairs, and 64 GTX transceivers inside, what does these numbers mean?  Does that mean the FPGA supports maximum 4 gen3x16 PCIe interface? 

Which documents should I read to understand the features?

 

Thanks.

 

 

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1 Solution
BoonT_Intel
Moderator
166 Views

Hi ChiaMing,

Yes, it means that the device has the available resource.

For example 4 PCIe blocks, it has 4 PCIe tile as stated in figure 3 of the S10 PCIE AVMM UG.

And for LVDS and XVCR, I think it is direct, the device has 576 LVDS and 64 XVCR inside.

This is for the device natively. However, in development kits, the device already mounts on the board with the fixed connection. So, some resources as stated as above is not fully routing out, for example, the board does not route all LVDS channel onboard. So, even though the device on the table stated the available resources but doesn’t mean the dev kit can fully utilize the resources because some of them are not connected on the board.


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BoonT_Intel
Moderator
167 Views

Hi ChiaMing,

Yes, it means that the device has the available resource.

For example 4 PCIe blocks, it has 4 PCIe tile as stated in figure 3 of the S10 PCIE AVMM UG.

And for LVDS and XVCR, I think it is direct, the device has 576 LVDS and 64 XVCR inside.

This is for the device natively. However, in development kits, the device already mounts on the board with the fixed connection. So, some resources as stated as above is not fully routing out, for example, the board does not route all LVDS channel onboard. So, even though the device on the table stated the available resources but doesn’t mean the dev kit can fully utilize the resources because some of them are not connected on the board.


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