RAM Based Shift Register

[Altera_Forum]

Hi, 

 I'm working on a design that uses shift registers. I wish to map those registers to the memory bits of my Cyclone III FPGA. I used the MegaWizard Plug-in Manager to generate the RAM-based shift register. The problem is that my design requires the distance between taps to be one. Unfortunately, the minimum allowed tap distance is 3.  My question is: Is there a way that I can build my own custom shift register and tell Quartus to map it to the memory bits?  Thanks in advance, A.AbdelFattah

[Altera_Forum]

I don't see any resource advantage if you go to low values of tap distance. 

Remember the tap points have to be connected to read port of a ram. each ram has one read port. So for every tap point a block of ram is needed, these are then read in series.   Having a tap per location implies one block per location and so you better off using registers in the first place.   If your one tap distance is only needed at a localised point you may consider combining shift between registers and ram.