Hello;In my design I write a VHDL code to infer ROMs. It were specified to be M9k with the following attribute: attribute romstyle : string;
attribute romstyle of q: signal is "m9k"; Then after compiling I didnot find these settings in the fitter report, however, I find other attributes for the other entities. Also the ROMs are inferred with the Altsync_ram function but didnot consume any M9K blocks. each ROM size is 8*256 I use the stratix3-EP3SL150F1152 chip. My question is what attributes can force the synthesis to use M9K bloks to infefer these ROMs? Thanks
If you are using the altsync_ram IP block, then you are not inferring a rom. Inference is done by writing behavioural RTL that behaves like a ram and the synthesis will replace your code with an altsyncram. If you are using an altsynram you need to set the ram style paramters.