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Hi everyone,
I'm using the remote update controller (cyclone III) on my Cyclone IV GX dev board with a EPCS128 flash memory. I wish to have two firmwares in my EPCS (factory and application). Actually, I placed the firmware like this in the EPCS: 0x000000 Factory image (hw0 + sw0) 0x440000 Application image (hw1 + sw1) (I'm not using the flash programmer to load the image in flash memory) The nios II boots correctly on the factory image when I start the board. But when I try to reconfig the FPGA with the application image using the remote update controller, the Factory image is loaded... I write 0x110000 to the remote update controller, then start the reconfig for loading the application image. Is this address correct? I think my problem comes when I'm creating the application image. Here is my script to create the .flash: --- Quote Start --- java -jar C:\altera\11.0\nios2eds\bin\sof2flash.jar --epcs --input="..\..\2Dcam.sof" --output="2Dcam_sof.flash" --verbose java -jar C:\altera\11.0\nios2eds\bin\elf2flash.jar --epcs --after="2Dcam_sof.flash" --input="..\2DCam\2DCam.elf" --output="2DCam_elf.flash" --offset 0 rem merge the two files copy /b /y 2Dcam_sof.flash+2DCam_elf.flash 2DCam.flash --- Quote End --- I create factory and application image (.flash) with this script. And load the factory image at address 0x000000 and the application at address 0x440000 in EPCS. Do I have to make something different for the application image, because her address is not 0x000000? Has anyone the same problem? Best regardsLink Copied
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I figure out the difference. When executing "make" command, I should do it like this:make CODE_BASE=0
Then the generated code in boot_loader_epcs_sii_siii_ciii.elf will start at address 0x0. Now by virtue of this commandelf2hex --input=obj/boot_loader_epcs_sii_siii_ciii.elf --output=kernel_epcs_boot_rom_synth.hex --width=32 --base=0 --end=0x3ff --record=4 --lower
the required boot loader code file(i.e. the .hex file) will be generated.
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Thank you hallodu, your solution for creating the bootloader for a User Image works fine for me in a Cyclone IV device with Quartus 12.0.
Cheers :o --- Quote Start --- Hi, Attached is my solution. In the .zip, you have all the files needed for the .bat. 1) Enter your application address (IMAGE_START) in boot_loader_epcs_bits_sii_siii_ciii.S file 2) running this .bat 3) copy SOPC_2Dcam_epcs_flash_controller_0_boot_rom_synth.hex in your <project>/SOPC_folder/synthesis/submodules/ 4) In Quartus, Processing -> Update Memory Initialization File 5) In Quartus, Processing -> Start -> Start Assembler Be careful, the .bat is for Quartus v11.1, if you are using another version. Open the .bat file with a text editor and change all 11.1 with your version number. for example: --- Quote End ---- Mark as New
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--- Quote Start --- Hi, The source code for the default bootloader is included in the Quartus distribution (C:\altera\11.1\ip\altera\nios2_ip\altera_nios2\boot_loader_sources) and must be modified for the application image. First you change the assembly file boot_loader_epcs_bits_sii_siii_ciii.S so that the bootloader for the application image jumps to the Nios code for the application image (which is just after the FPGA configuration for EPCS). Here is one way to change to this code: 1) Add a define to the offset to the application image:# define IMAGE_START 0x00440000 2) Replace all occurencs of the following code : (several places in the code) movi r_flash_ptr, xx with: movhi r_flash_ptr, %hi(IMAGE_START) ori r_flash_ptr, r_flash_ptr, xx 3) Add the following statement before fp_short_circuit: orhi r_flash_ptr, r_flash_ptr, %hi(IMAGE_START) This should work if the 16 lower bits of IMAGE_START are 0. Then run make (Last time I tried it I only got it working with the gcc3 quartus 10.0, not with gcc4). Then go to the obj directory and run: elf2hex --input="boot_loader_epcs_sii_siii_ciii.elf" --output="epcs_controller_boot_rom.hex" --base=0 --width=32 --end=1023 --record=4 --lower You must then replace the boot rom file in your design with this file. In Quartus 11.1 the file name may be changed to epcs_flash_controller_boot_rom_synth.hex. Note that you do not have to recompile the whole design, you just select 'Update Memory Iniialization File' in Quartus and run the asssembler after changing the bootloader. I have tested this for Stratix II,III,IV and Cyclone IV. --- Quote End --- Hi st_f, Do you have an idea how to change the bootloader on Quartus 12.1sp1 for a Cyclone IV GX? Thanks Regards
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If the bootloader does not work for Cyclone IV GX it may be the valdation test fail on the Device ID in the epcs configuration data (in boot_loader_epcs_bits_sii_siii_ciii.S) . You may include the ID for Cyclone IV GX or you may skip the test as it is not nescessary. It is a simple code to understand.
I do not know were to obtain the Device ID, but you may get it from the flash file. This bootloader does however work for Cyclone IV (device ID 0xf7).- Mark as New
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--- Quote Start --- If the bootloader does not work for Cyclone IV GX it may be the valdation test fail on the Device ID in the epcs configuration data (in boot_loader_epcs_bits_sii_siii_ciii.S) . You may include the ID for Cyclone IV GX or you may skip the test as it is not nescessary. It is a simple code to understand. I do not know were to obtain the Device ID, but you may get it from the flash file. This bootloader does however work for Cyclone IV (device ID 0xf7). --- Quote End --- Thanks for your reply! I tried to skip ID test, but it changes nothing. Attached is my file. Can I write my Image at address 0x00600000? I'm using now Quartus v12.sp1, but use boot loader sources file from v11.1. Can this create problem? Boot loader sources file from v12.sp1 are different. How must I to modify it?
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Cannot find anything wrong in your changes. You should be able to change image address to 0x00600000.
I have tested the bootloader code with Quartus/SOPC Builder 12.1 and that worked. I have also been using older versions of the compiled bootloader code on newer Quartus versions without problems.- Mark as New
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--- Quote Start --- Cannot find anything wrong in your changes. You should be able to change image address to 0x00600000. I have tested the bootloader code with Quartus/SOPC Builder 12.1 and that worked. I have also been using older versions of the compiled bootloader code on newer Quartus versions without problems. --- Quote End --- Have you tested it on a cyclone IV GX or a cyclone IV?
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--- Quote Start --- Have you tested it on a cyclone IV GX or a cyclone IV? --- Quote End --- I have tested it on Cyclone IV (not GX)
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OK!
I think the problem comes from the device (cyclone IV gx). I tried my bootloader with a cyclone IV and that worked. Do you have another idea what can be the problem?- Mark as New
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I am not sure what the problem is. Does the default bootloader (from Qsys/SoPC builder) work?
Does the bootloader compiled by you work in factory mode or is the problem to restart in user mode?- Mark as New
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Yes, the bootloader of QSYS works fine.
If I place my firmware at address 0, I can boot without problem. But if I load my firmware at address 0x600000 (with the custom bootloader). When I try to reboot on, only the hardware is loading.- Mark as New
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Thank you st_f for the help. I too am seeing the same issue.
Greg- Mark as New
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Thank you st_f for the help. I too am seeing the same issue and your post has really helped me.
I am having an issue though. When I try to generate the hex file with the command line you've given above, I get all 0's in the data field of the hex file. If you have any idea what's wrong please let me know. Thanks PS: Please disregard, I didn't see the whole thread where others have the 0's problem. Answer should be in here somewhere. thanks.- Mark as New
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Hello,
I've tried to implement the new bootloader on a Cyclone IV and I found a bug in "boot_loader_epcs_bits_sii_siii_ciii.S" writed by hallodu. To have a full compatibility with all address you must write this code before "fp_short_circuit:" label: movhi r24, %hi(IMAGE_START) add r_flash_ptr, r_flash_ptr, r24 //orhi r_flash_ptr, r_flash_ptr, %hi(IMAGE_START) best regards- Mark as New
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Thanks to all..i got resolved Bootloader issue @CycloneIII..
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--- Quote Start --- Hi, The source code for the default bootloader is included in the Quartus distribution (C:\altera\11.1\ip\altera\nios2_ip\altera_nios2\boot_loader_sources) and must be modified for the application image. First you change the assembly file boot_loader_epcs_bits_sii_siii_ciii.S so that the bootloader for the application image jumps to the Nios code for the application image (which is just after the FPGA configuration for EPCS). Here is one way to change to this code: 1) Add a define to the offset to the application image: # define IMAGE_START 0x00440000 2) Replace all occurencs of the following code : (several places in the code) movi r_flash_ptr, xx with: movhi r_flash_ptr, %hi(IMAGE_START) ori r_flash_ptr, r_flash_ptr, xx 3) Add the following statement before fp_short_circuit: orhi r_flash_ptr, r_flash_ptr, %hi(IMAGE_START) This should work if the 16 lower bits of IMAGE_START are 0. Then run make (Last time I tried it I only got it working with the gcc3 quartus 10.0, not with gcc4). Then go to the obj directory and run: elf2hex --input="boot_loader_epcs_sii_siii_ciii.elf" --output="epcs_controller_boot_rom.hex" --base=0 --width=32 --end=1023 --record=4 --lower You must then replace the boot rom file in your design with this file. In Quartus 11.1 the file name may be changed to epcs_flash_controller_boot_rom_synth.hex. Note that you do not have to recompile the whole design, you just select 'Update Memory Iniialization File' in Quartus and run the asssembler after changing the bootloader. I have tested this for Stratix II,III,IV and Cyclone IV. --- Quote End --- Will this method works for EPCQ 256?? I'm trying to implement dual boot on ArriaV, with Factory Image @0x00 and Application Image @0x800000. I have modified the default bootloader boot_"loader_epcq256_cv" in the same manner as above. But not working !!! Thanks in advance for your suggestions and reply.
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If you are using a recent quartos, try using the newer boot code that converts avalon reads directly into epcq accesses.
You then point the nios reset vector directly at the flash address (which takes up 32MB of address space foe an EPCQ256). Note that I've not used that logic, we load the nios over pcie.
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